(j) any decision relating to the remuneration provided in respect of such use shall be subject to judicial or other independent review by a distinct higher authority;
(k) the Party shall not be obliged to apply the conditions set out in subparagraphs (b) and (f) where such use is permitted to remedy a practice determined after judicial or administrative process to be anticompetitive. The need to correct anticompetitive practices may be taken into account in determining the amount of remuneration in such cases. Competent authorities shall have the authority to refuse termination of authorization if and when the conditions that led to such authorization are likely to recur;
(l) the Party shall not authorize the use of the subject matter of a patent to permit the exploitation of another patent except as a remedy for an adjudicated violation of domestic laws regarding anticompetitive practices.
11. Where the subject matter of a patent is a process for obtaining a product, each Party shall, in any infringement proceeding, place on the defendant the burden of establishing that the allegedly infringing product was made by a process other than the patented process in one of the following situations:
(a) the product obtained by the patented process is new; or
(b) a substantial likelihood exists that the allegedly infringing product was made by the process and the patent owner has been unable through reasonable efforts to determine the process actually used.
In the gathering and evaluation of evidence, the legitimate interests of the defendant in protecting its trade secrets shall be taken into account.
12. Each Party shall provide a term of protection for patents of at least 20 years from the date of filing or 17 years from the date of grant. A Party may extend the term of patent protection, in appropriate cases, to compensate for delays caused by regulatory approval processes.
Article 1710: Layout Designs of Semiconductor Integrated
Circuits
1. Each Party shall protect layout designs (topographies) of integrated circuits ("layout designs") in accordance with Articles 2 through 7, 12 and 16(3), other than Article 6(3), of the Treaty on Intellectual Property in Respect of Integrated Circuits as opened for signature on 26 May 1989.