Set Selected Program Flag(5 usec.)
stf Address 11 to 17 inclusive
In-Out Transfer Group(5 usec. without in-out wait)
iot x Y Operation Code 72
The variations within this group of instructions perform all the in-out control and information transfer functions. If bit six (normally the Indirect Address bit) is a ONE, the computer will halt and wait for the completion pulse from the device activated. When this device delivers its completion, the computer will resume operation of the instruction sequence.
An incidental fact which may be of importance in certain scientific or real time control applications is that the time origin of operations following an in-out completion pulse is identical with the time of that pulse.
Most in-out operations require a known minimum time before completion. This time may be utilized for programming. The appropriate In-Out Transfer is given with no in-out wait (bit six a ZERO). The instruction sequence then continues. This sequence must include an iot instruction which performs nothing but the in-out wait. This last instruction must occur before the safe minimum time. A table of minimum times for all in-out devices is delivered with the computer. It lists minimum time before completion pulse and minimum In-Out Register free time.
The details of the In-Out Transfer variations are listed under Input-Output.
The mnemonic codes and addresses for the standard equipment are:
Read Paper Tape Alphanumeric Mode
rpa Address 1
Read Paper Tape Binary Mode
rpb Address 2
Typewriter Output
tyo Address 3
Typewriter Input
tyi Address 4
Punch Paper Tape Alphanumeric Mode
ppa Address 5
Punch Paper Tape Binary Mode
ppb Address 6